Add filter switch to FSK modulator

This commit is contained in:
Andreas Eversberg 2019-09-09 19:22:43 +02:00
parent ee26e33e4d
commit 41f8066d2f
2 changed files with 27 additions and 4 deletions

View File

@ -39,7 +39,7 @@
* level = level to modulate the frequencies
* coherent = use coherent modulation (FFSK)
*/
int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int samplerate, double bitrate, double f0, double f1, double level, int coherent)
int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int samplerate, double bitrate, double f0, double f1, double level, int coherent, int filter)
{
int i;
int rc;
@ -76,9 +76,9 @@ int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int sa
PDEBUG(DDSP, DEBUG_DEBUG, "Bitduration of %.4f bits per sample @ %d.\n", fsk->bits_per_sample, samplerate);
fsk->phaseshift65536[0] = f0 / (double)samplerate * 65536.0;
PDEBUG(DDSP, DEBUG_DEBUG, "phaseshift65536[0] = %.4f\n", fsk->phaseshift65536[0]);
PDEBUG(DDSP, DEBUG_DEBUG, "F0 = %.0f Hz (phaseshift65536[0] = %.4f)\n", f0, fsk->phaseshift65536[0]);
fsk->phaseshift65536[1] = f1 / (double)samplerate * 65536.0;
PDEBUG(DDSP, DEBUG_DEBUG, "phaseshift65536[1] = %.4f\n", fsk->phaseshift65536[1]);
PDEBUG(DDSP, DEBUG_DEBUG, "F1 = %.0f Hz (phaseshift65536[1] = %.4f)\n", f1, fsk->phaseshift65536[1]);
/* use coherent modulation, i.e. each bit has an integer number of
* half waves and starts/ends at zero crossing
@ -86,6 +86,7 @@ int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int sa
if (coherent) {
double waves;
PDEBUG(DDSP, DEBUG_DEBUG, "enable coherent FSK modulation mode\n");
fsk->coherent = 1;
waves = (f0 / bitrate);
if (fabs(round(waves * 2) - (waves * 2)) > 0.001) {
@ -101,6 +102,20 @@ int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int sa
fsk->cycles_per_bit65536[1] = waves * 65536.0;
}
/* if filter is enabled, add a band pass filter to smoot the spectrum of the tones
* the bandwidth is twice the difference between f0 and f1
*/
if (filter) {
double low = (f0 + f1) / 2.0 - fabs(f0 - f1);
double high = (f0 + f1) / 2.0 + fabs(f0 - f1);
PDEBUG(DDSP, DEBUG_DEBUG, "enable filter to smooth FSK transmission. (frequency rage %.0f .. %.0f)\n", low, high);
fsk->filter = 1;
/* use fourth order (2 iter) filter, since it is as fast as second order (1 iter) filter */
iir_highpass_init(&fsk->lp[0], low, samplerate, 2);
iir_lowpass_init(&fsk->lp[1], high, samplerate, 2);
}
return 0;
error:
@ -180,6 +195,12 @@ next_bit:
goto next_bit;
}
/* post filter */
if (fsk->filter) {
iir_process(&fsk->lp[0], sample, length);
iir_process(&fsk->lp[1], sample, length);
}
done:
fsk->tx_phase65536 = phase;

View File

@ -15,6 +15,8 @@ typedef struct fsk_mod {
int low_bit, high_bit; /* a low or high deviation means which bit? */
int tx_bit; /* current transmitting bit (-1 if not set) */
double tx_bitpos; /* current transmit position in bit */
int filter; /* set, if filters are used */
iir_filter_t lp[2]; /* filter to smoot transmission spectrum */
} fsk_mod_t;
typedef struct fsk_demod {
@ -30,7 +32,7 @@ typedef struct fsk_demod {
double rx_bitadjust; /* how much does a bit change cause the sample clock to be adjusted in phase */
} fsk_demod_t;
int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int samplerate, double bitrate, double f0, double f1, double level, int coherent);
int fsk_mod_init(fsk_mod_t *fsk, void *inst, int (*send_bit)(void *inst), int samplerate, double bitrate, double f0, double f1, double level, int coherent, int filter);
void fsk_mod_cleanup(fsk_mod_t *fsk);
int fsk_mod_send(fsk_mod_t *fsk, sample_t *sample, int length, int add);
void fsk_mod_tx_reset(fsk_mod_t *fsk);