bts: refactor handling and parsing of RACH.ind
This patch is a set of tightly related changes: - group all RACH.ind parameters into struct 'rach_ind_params'; - group Channel Request parameters into struct 'chan_req_params'; - get rid of egprs_mslot_class_from_ra(), priority_from_ra(), and is_single_block(), introduce unified parse_rach_ind(); - improve logging, get rid of redundant information. This is needed for proper EGPRS Packet Channel Request handling. Change-Id: I5fe7e0f51bf5c9eac073935cc4f4edd667c67c6e Related: OS#1548
This commit is contained in:
parent
088dcbc016
commit
a0a0b7fb0e
271
src/bts.cpp
271
src/bts.cpp
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@ -677,191 +677,165 @@ uint32_t BTS::rfn_to_fn(int32_t rfn)
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}
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/* 3GPP TS 44.060:
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* Table 11.2.5.3: PACKET CHANNEL REQUEST
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* Table 11.2.5a.3: EGPRS PACKET CHANNEL REQUEST
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* Both GPRS and EGPRS use same MultislotClass coding, but since use of PCCCH is
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* Table 11.2.5.2: PACKET CHANNEL REQUEST
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* Table 11.2.5a.2: EGPRS PACKET CHANNEL REQUEST
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* Both GPRS and EGPRS use same MultislotClass coding, but since PRACH is
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* deprecated, no PACKET CHANNEL REQUEST exists, which means for GPRS we will
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* receive CCCH RACH which doesn't contain any mslot class. Hence in the end we
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* can only receive EGPRS mslot class through 11-bit EGPRS PACKET CHANNEL
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* REQUEST.
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*/
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static inline uint8_t egprs_mslot_class_from_ra(uint16_t ra, bool is_11bit)
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* can only receive EGPRS mslot class through 11-bit EGPRS PACKET CHANNEL REQUEST. */
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static int parse_egprs_pkt_ch_req(uint16_t ra11, struct chan_req_params *chan_req)
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{
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/* EGPRS multislot class is only present in One Phase Access Request */
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if (is_11bit && (ra >> 10) == 0x00) /* .0xx xxx. .... */
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return ((ra & 0x3e0) >> 5) + 1;
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/* set EGPRS multislot class to 0 for 8-bit RACH, since we don't know it yet */
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return 0;
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}
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static inline uint16_t priority_from_ra(uint16_t ra, bool is_11bit)
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{
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if (is_11bit)
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return (ra & 0x18) >> 3;
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if ((ra11 >> 10) == 0x00) /* .0xx xxx. .... */
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chan_req->egprs_mslot_class = ((ra11 & 0x3e0) >> 5) + 1;
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return 0;
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}
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static inline bool is_single_block(bool force_two_phase, uint16_t ra, enum ph_burst_type burst_type, bool is_11bit)
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/* NOTE: chan_req needs to be zero-initialized by the caller */
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static int parse_rach_ind(const struct rach_ind_params *rip,
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struct chan_req_params *chan_req)
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{
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bool sb = false;
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int rc;
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if ((ra & 0xf8) == 0x70)
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LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation\n");
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else if (force_two_phase)
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LOGP(DRLCMAC, LOGL_DEBUG,
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"MS requests single phase access, but we force two phase access [RACH is %s bit]\n",
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is_11bit ? "11" : "8");
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switch(burst_type) {
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case GSM_L1_BURST_TYPE_ACCESS_0:
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if (is_11bit) {
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LOGP(DRLCMAC, LOGL_ERROR, "Error: GPRS 11 bit RACH not supported\n");
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return false;
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}
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if ((ra & 0xf8) == 0x70)
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return true;
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if (force_two_phase)
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return true;
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break;
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case GSM_L1_BURST_TYPE_ACCESS_1: /* deliberate fall-through */
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case GSM_L1_BURST_TYPE_ACCESS_2:
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if (is_11bit) {
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if (!(ra & (1 << 10))) {
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if (force_two_phase)
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return true;
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return false;
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}
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return true;
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}
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LOGP(DRLCMAC, LOGL_ERROR, "Unexpected RACH burst type %u for 8-bit RACH\n", burst_type);
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break;
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switch (rip->burst_type) {
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case GSM_L1_BURST_TYPE_NONE:
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LOGP(DRLCMAC, LOGL_ERROR, "PCU has not received burst type from BTS\n");
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LOGP(DRLCMAC, LOGL_ERROR, "RACH.ind contains no burst type, assuming TS0\n");
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/* fall-through */
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case GSM_L1_BURST_TYPE_ACCESS_0:
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if (rip->is_11bit) { /* 11 bit Access Burst with TS0 => Packet Channel Request */
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LOGP(DRLCMAC, LOGL_ERROR, "11 bit Packet Channel Request "
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"is not supported (PBCCH is deprecated)\n");
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return -ENOTSUP;
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}
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/* 3GPP TS 44.018, table 9.1.8.1: 8 bit CHANNEL REQUEST.
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* Mask 01110xxx indicates single block packet access. */
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chan_req->single_block = ((rip->ra & 0xf8) == 0x70);
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break;
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case GSM_L1_BURST_TYPE_ACCESS_1:
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case GSM_L1_BURST_TYPE_ACCESS_2:
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if (!rip->is_11bit) { /* TS1/TS2 => EGPRS Packet Channel Request (always 11 bit) */
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LOGP(DRLCMAC, LOGL_ERROR, "11 bit Packet Channel Request "
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"is not supported (PBCCH is deprecated)\n");
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return -ENOTSUP;
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}
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rc = parse_egprs_pkt_ch_req(rip->ra, chan_req);
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if (rc)
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return rc;
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break;
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default:
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LOGP(DRLCMAC, LOGL_ERROR, "Unexpected RACH burst type %u for %s-bit RACH\n",
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burst_type, is_11bit ? "11" : "8");
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LOGP(DRLCMAC, LOGL_ERROR, "RACH.ind contains unknown burst type 0x%02x "
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"(%u bit)\n", rip->burst_type, rip->is_11bit ? 11 : 8);
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return -EINVAL;
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}
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return sb;
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return 0;
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}
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int BTS::rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, bool is_11bit,
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enum ph_burst_type burst_type)
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int BTS::rcv_rach(const struct rach_ind_params *rip)
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{
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struct chan_req_params chan_req = { 0 };
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struct gprs_rlcmac_ul_tbf *tbf = NULL;
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uint8_t trx_no, ts_no = 0;
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uint8_t sb = 0;
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uint8_t trx_no, ts_no;
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uint32_t sb_fn = 0;
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int rc = 0;
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int plen;
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uint8_t usf = 7;
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uint8_t tsc = 0, ta = qta2ta(qta);
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uint8_t egprs_ms_class = egprs_mslot_class_from_ra(ra, is_11bit);
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bool failure = false;
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GprsMs *ms;
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uint8_t tsc = 0;
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int plen, rc;
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do_rate_ctr_inc(CTR_RACH_REQUESTS);
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if (is_11bit)
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if (rip->is_11bit)
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do_rate_ctr_inc(CTR_11BIT_RACH_REQUESTS);
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/* Determine full frame number */
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Fn = rfn_to_fn(Fn);
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uint32_t Fn = rfn_to_fn(rip->rfn);
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uint8_t ta = qta2ta(rip->qta);
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send_gsmtap(PCU_GSMTAP_C_UL_RACH, true, 0, ts_no, GSMTAP_CHANNEL_RACH,
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Fn, (uint8_t*)&ra, is_11bit ? 2 : 1);
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send_gsmtap(PCU_GSMTAP_C_UL_RACH, true, rip->trx_nr, rip->ts_nr,
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GSMTAP_CHANNEL_RACH, Fn, (uint8_t *) &rip->ra,
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rip->is_11bit ? 2 : 1);
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LOGP(DRLCMAC, LOGL_DEBUG, "MS requests UL TBF on RACH, "
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"so we provide one: ra=0x%02x Fn=%u qta=%d is_11bit=%d:\n",
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ra, Fn, qta, is_11bit);
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LOGP(DRLCMAC, LOGL_DEBUG, "MS requests Uplink resource on CCCH/RACH: "
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"ra=0x%02x (%d bit) Fn=%u qta=%d\n", rip->ra,
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rip->is_11bit ? 11 : 8, Fn, rip->qta);
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sb = is_single_block(m_bts.force_two_phase, ra, burst_type, is_11bit);
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/* Parse [EGPRS Packet] Channel Request from RACH.ind */
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rc = parse_rach_ind(rip, &chan_req);
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if (rc) /* Send RR Immediate Assignment Reject */
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goto send_imm_ass_rej;
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if (sb) {
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if (chan_req.single_block)
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LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation\n");
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else if (m_bts.force_two_phase) {
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LOGP(DRLCMAC, LOGL_DEBUG, "MS requests single block allocation, "
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"but we force two phase access\n");
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chan_req.single_block = true;
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}
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/* Should we allocate a single block or an Uplink TBF? */
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if (chan_req.single_block) {
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rc = sba()->alloc(&trx_no, &ts_no, &sb_fn, ta);
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if (rc < 0) {
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failure = true;
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LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource for "
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"single block allocation."
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"sending Immediate "
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"Assignment Uplink (AGCH) reject\n");
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} else {
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tsc = m_bts.trx[trx_no].pdch[ts_no].tsc;
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LOGP(DRLCMAC, LOGL_DEBUG, "RX: [PCU <- BTS] RACH "
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" qbit-ta=%d ra=0x%02x, Fn=%d (%d,%d,%d),"
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" SBFn=%d\n",
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qta, ra,
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Fn, (Fn / (26 * 51)) % 32, Fn % 51, Fn % 26,
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sb_fn);
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LOGP(DRLCMAC, LOGL_INFO, "TX: Immediate Assignment "
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"Uplink (AGCH)\n");
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"single block allocation: rc=%d\n", rc);
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/* Send RR Immediate Assignment Reject */
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goto send_imm_ass_rej;
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}
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tsc = m_bts.trx[trx_no].pdch[ts_no].tsc;
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LOGP(DRLCMAC, LOGL_DEBUG, "Allocated a single block at "
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"SBFn=%u TRX=%u TS=%u\n", sb_fn, trx_no, ts_no);
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} else {
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ms = ms_alloc(0, egprs_ms_class);
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// Create new TBF
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/* FIXME: Copy and paste with other routines.. */
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GprsMs *ms = ms_alloc(0, chan_req.egprs_mslot_class);
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tbf = tbf_alloc_ul_tbf(&m_bts, ms, -1, true);
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if (!tbf) {
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LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource sending "
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"Immediate Assignment Uplink (AGCH) "
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"reject\n");
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LOGP(DRLCMAC, LOGL_NOTICE, "No PDCH resource for Uplink TBF\n");
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/* Send RR Immediate Assignment Reject */
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rc = -EBUSY;
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failure = true;
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} else {
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tbf->set_ta(ta);
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TBF_SET_STATE(tbf, GPRS_RLCMAC_FLOW);
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TBF_ASS_TYPE_SET(tbf, GPRS_RLCMAC_FLAG_CCCH);
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T_START(tbf, T3169, 3169, "RACH (new UL-TBF)", true);
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LOGPTBF(tbf, LOGL_DEBUG, "[UPLINK] START\n");
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LOGPTBF(tbf, LOGL_DEBUG, "RX: [PCU <- BTS] RACH "
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"qbit-ta=%d ra=0x%02x, Fn=%d "
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" (%d,%d,%d)\n",
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qta, ra, Fn, (Fn / (26 * 51)) % 32,
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Fn % 51, Fn % 26);
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LOGPTBF(tbf, LOGL_INFO, "TX: START Immediate Assignment Uplink (AGCH)\n");
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trx_no = tbf->trx->trx_no;
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ts_no = tbf->first_ts;
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usf = tbf->m_usf[ts_no];
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tsc = tbf->tsc();
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goto send_imm_ass_rej;
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}
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/* FIXME: Copy and paste with other routines.. */
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tbf->set_ta(ta);
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TBF_SET_STATE(tbf, GPRS_RLCMAC_FLOW);
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TBF_ASS_TYPE_SET(tbf, GPRS_RLCMAC_FLAG_CCCH);
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T_START(tbf, T3169, 3169, "RACH (new UL-TBF)", true);
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trx_no = tbf->trx->trx_no;
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ts_no = tbf->first_ts;
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usf = tbf->m_usf[ts_no];
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tsc = tbf->tsc();
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}
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bitvec *immediate_assignment = bitvec_alloc(22, tall_pcu_ctx) /* without plen */;
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bitvec_unhex(immediate_assignment,
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"2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b");
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send_imm_ass_rej:
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/* Allocate a bit-vector for RR Immediate Assignment [Reject] */
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struct bitvec *bv = bitvec_alloc(22, tall_pcu_ctx); /* without plen */
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bitvec_unhex(bv, "2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b2b");
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if (failure) {
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if (rc != 0) {
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LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment Reject on AGCH\n");
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plen = Encoding::write_immediate_assignment_reject(
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immediate_assignment, ra, Fn,
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burst_type);
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bv, rip->ra, Fn, rip->burst_type);
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do_rate_ctr_inc(CTR_IMMEDIATE_ASSIGN_REJ);
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}
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else {
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LOGP(DRLCMAC, LOGL_DEBUG,
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" - TRX=%d (%d) TS=%d TA=%d TSC=%d TFI=%d USF=%d\n",
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trx_no, m_bts.trx[trx_no].arfcn, ts_no, ta, tsc,
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tbf ? tbf->tfi() : -1, usf);
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// N. B: if tbf == NULL then SBA is used for Imm. Ass. below
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plen = Encoding::write_immediate_assignment(tbf, immediate_assignment, false, ra, Fn, ta,
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m_bts.trx[trx_no].arfcn, ts_no, tsc, usf, false, sb_fn,
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m_bts.alpha, m_bts.gamma, -1, burst_type);
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}
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if (plen >= 0) {
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} else {
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LOGP(DRLCMAC, LOGL_DEBUG, "Tx Immediate Assignment on AGCH: "
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"TRX=%u (ARFCN %u) TS=%u TA=%u TSC=%u TFI=%d USF=%d\n",
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trx_no, m_bts.trx[trx_no].arfcn & ~ARFCN_FLAG_MASK,
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ts_no, ta, tsc, tbf ? tbf->tfi() : -1, usf);
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plen = Encoding::write_immediate_assignment(
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tbf, bv, false, rip->ra, Fn, ta, m_bts.trx[trx_no].arfcn,
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ts_no, tsc, usf, false, sb_fn, m_bts.alpha, m_bts.gamma, -1,
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rip->burst_type);
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do_rate_ctr_inc(CTR_IMMEDIATE_ASSIGN_UL_TBF);
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pcu_l1if_tx_agch(immediate_assignment, plen);
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}
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bitvec_free(immediate_assignment);
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if (plen >= 0)
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pcu_l1if_tx_agch(bv, plen);
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else
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rc = plen;
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bitvec_free(bv);
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return rc;
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}
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@ -874,25 +848,25 @@ static uint32_t ptcch_slot_map[PTCCH_TAI_NUM] = {
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324, 350, 376, 402,
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};
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int BTS::rcv_ptcch_rach(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta)
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int BTS::rcv_ptcch_rach(const struct rach_ind_params *rip)
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{
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uint32_t fn416 = rfn_to_fn(rip->rfn) % 416;
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struct gprs_rlcmac_bts *bts = bts_data();
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struct gprs_rlcmac_pdch *pdch;
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uint32_t fn416 = fn % 416;
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uint8_t ss;
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/* Prevent buffer overflow */
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if (trx_nr >= ARRAY_SIZE(bts->trx) || ts_nr >= 8) {
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LOGP(DRLCMAC, LOGL_ERROR, "Malformed RACH.ind message "
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"(TRX=%u TS=%u FN=%u)\n", trx_nr, ts_nr, fn);
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if (rip->trx_nr >= ARRAY_SIZE(bts->trx) || rip->ts_nr >= 8) {
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LOGP(DRLCMAC, LOGL_ERROR, "(TRX=%u TS=%u RFN=%u) Rx malformed "
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"RACH.ind (PTCCH/U)\n", rip->trx_nr, rip->ts_nr, rip->rfn);
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return -EINVAL;
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}
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/* Make sure PDCH time-slot is enabled */
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pdch = &bts->trx[trx_nr].pdch[ts_nr];
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pdch = &bts->trx[rip->trx_nr].pdch[rip->ts_nr];
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if (!pdch->m_is_enabled) {
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LOGP(DRLCMAC, LOGL_NOTICE, "Rx PTCCH RACH.ind for inactive PDCH "
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"(TRX=%u TS=%u FN=%u)\n", trx_nr, ts_nr, fn);
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LOGP(DRLCMAC, LOGL_NOTICE, "(TRX=%u TS=%u RFN=%u) Rx RACH.ind (PTCCH/U) "
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"for inactive PDCH\n", rip->trx_nr, rip->ts_nr, rip->rfn);
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return -EAGAIN;
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}
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@ -901,14 +875,15 @@ int BTS::rcv_ptcch_rach(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta)
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if (ptcch_slot_map[ss] == fn416)
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break;
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if (ss == PTCCH_TAI_NUM) {
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LOGP(DRLCMAC, LOGL_ERROR, "Failed to map PTCCH/U sub-slot for fn=%u\n", fn);
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LOGP(DRLCMAC, LOGL_ERROR, "(TRX=%u TS=%u RFN=%u) Failed to map "
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"PTCCH/U sub-slot\n", rip->trx_nr, rip->ts_nr, rip->rfn);
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return -ENODEV;
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}
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/* Apply the new Timing Advance value */
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LOGP(DRLCMAC, LOGL_INFO, "Continuous Timing Advance update "
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"for TAI %u, new TA is %u\n", ss, qta2ta(qta));
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pdch->update_ta(ss, qta2ta(qta));
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"for TAI %u, new TA is %u\n", ss, qta2ta(rip->qta));
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pdch->update_ta(ss, qta2ta(rip->qta));
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return 0;
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}
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23
src/bts.h
23
src/bts.h
|
@ -267,6 +267,24 @@ enum {
|
|||
STAT_MS_PRESENT,
|
||||
};
|
||||
|
||||
/* RACH.ind parameters (to be parsed) */
|
||||
struct rach_ind_params {
|
||||
enum ph_burst_type burst_type;
|
||||
bool is_11bit;
|
||||
uint16_t ra;
|
||||
uint8_t trx_nr;
|
||||
uint8_t ts_nr;
|
||||
uint32_t rfn;
|
||||
int16_t qta;
|
||||
};
|
||||
|
||||
/* [EGPRS Packet] Channel Request parameters (parsed) */
|
||||
struct chan_req_params {
|
||||
unsigned int egprs_mslot_class;
|
||||
unsigned int priority;
|
||||
bool single_block;
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
/**
|
||||
* I represent a GSM BTS. I have one or more TRX, I know the current
|
||||
|
@ -302,9 +320,8 @@ public:
|
|||
int rcv_imm_ass_cnf(const uint8_t *data, uint32_t fn);
|
||||
|
||||
uint32_t rfn_to_fn(int32_t rfn);
|
||||
int rcv_rach(uint16_t ra, uint32_t Fn, int16_t qta, bool is_11bit,
|
||||
enum ph_burst_type burst_type);
|
||||
int rcv_ptcch_rach(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta);
|
||||
int rcv_rach(const struct rach_ind_params *rip);
|
||||
int rcv_ptcch_rach(const struct rach_ind_params *rip);
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||||
|
||||
void snd_dl_ass(gprs_rlcmac_tbf *tbf, bool poll, uint16_t pgroup);
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||||
|
||||
|
|
|
@ -432,10 +432,21 @@ static int pcu_rx_rts_req(struct gsm_pcu_if_rts_req *rts_req)
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|||
/* C -> C++ adapter for direct DSP access code (e.g. osmo-bts-sysmo) */
|
||||
extern "C" int pcu_rx_rach_ind_ptcch(uint8_t trx_nr, uint8_t ts_nr, uint32_t fn, int16_t qta)
|
||||
{
|
||||
return BTS::main_bts()->rcv_ptcch_rach(trx_nr, ts_nr, fn, qta);
|
||||
struct rach_ind_params rip = {
|
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/* The content of RA is not of interest on PTCCH/U */
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.burst_type = GSM_L1_BURST_TYPE_ACCESS_0,
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||||
.is_11bit = false,
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||||
.ra = 0x00,
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.trx_nr = trx_nr,
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.ts_nr = ts_nr,
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.rfn = fn,
|
||||
.qta = qta,
|
||||
};
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||||
|
||||
return BTS::main_bts()->rcv_ptcch_rach(&rip);
|
||||
}
|
||||
|
||||
static int pcu_rx_rach_ind(struct gsm_pcu_if_rach_ind *rach_ind)
|
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static int pcu_rx_rach_ind(const struct gsm_pcu_if_rach_ind *rach_ind)
|
||||
{
|
||||
int rc = 0;
|
||||
int current_fn = get_current_fn();
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|
@ -444,17 +455,22 @@ static int pcu_rx_rach_ind(struct gsm_pcu_if_rach_ind *rach_ind)
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"qta=%d, ra=0x%02x, fn=%u, cur_fn=%d, is_11bit=%d\n", rach_ind->sapi, rach_ind->qta,
|
||||
rach_ind->ra, rach_ind->fn, current_fn, rach_ind->is_11bit);
|
||||
|
||||
struct rach_ind_params rip = {
|
||||
.burst_type = (enum ph_burst_type) rach_ind->burst_type,
|
||||
.is_11bit = rach_ind->is_11bit > 0,
|
||||
.ra = rach_ind->ra,
|
||||
.trx_nr = rach_ind->trx_nr,
|
||||
.ts_nr = rach_ind->ts_nr,
|
||||
.rfn = rach_ind->fn,
|
||||
.qta = rach_ind->qta,
|
||||
};
|
||||
|
||||
switch (rach_ind->sapi) {
|
||||
case PCU_IF_SAPI_RACH:
|
||||
rc = BTS::main_bts()->rcv_rach(
|
||||
rach_ind->ra, rach_ind->fn,
|
||||
rach_ind->qta, rach_ind->is_11bit,
|
||||
(ph_burst_type)rach_ind->burst_type);
|
||||
rc = BTS::main_bts()->rcv_rach(&rip);
|
||||
break;
|
||||
case PCU_IF_SAPI_PTCCH:
|
||||
rc = BTS::main_bts()->rcv_ptcch_rach(
|
||||
rach_ind->trx_nr, rach_ind->ts_nr,
|
||||
rach_ind->fn, rach_ind->qta);
|
||||
rc = BTS::main_bts()->rcv_ptcch_rach(&rip);
|
||||
break;
|
||||
default:
|
||||
LOGP(DL1IF, LOGL_ERROR, "Received PCU rach request with "
|
||||
|
|
|
@ -54,6 +54,21 @@ bool spoof_mnc_3_digits = false;
|
|||
/* Measurements shared by all unit tests */
|
||||
static struct pcu_l1_meas meas;
|
||||
|
||||
static int bts_handle_rach(BTS *bts, uint16_t ra, uint32_t Fn, int16_t qta)
|
||||
{
|
||||
struct rach_ind_params rip = {
|
||||
.burst_type = GSM_L1_BURST_TYPE_ACCESS_0,
|
||||
.is_11bit = false,
|
||||
.ra = ra,
|
||||
.trx_nr = 0,
|
||||
.ts_nr = 0,
|
||||
.rfn = Fn,
|
||||
.qta = qta,
|
||||
};
|
||||
|
||||
return bts->rcv_rach(&rip);
|
||||
}
|
||||
|
||||
static void check_tbf(gprs_rlcmac_tbf *tbf)
|
||||
{
|
||||
OSMO_ASSERT(tbf);
|
||||
|
@ -581,7 +596,7 @@ static gprs_rlcmac_ul_tbf *establish_ul_tbf_single_phase(BTS *the_bts,
|
|||
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
||||
the_bts->rcv_rach(0x03, *fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x03, *fn, qta);
|
||||
|
||||
ul_tbf = the_bts->ul_tbf_by_tfi(tfi, trx_no, ts_no);
|
||||
OSMO_ASSERT(ul_tbf != NULL);
|
||||
|
@ -667,7 +682,7 @@ static gprs_rlcmac_ul_tbf *puan_urbb_len_issue(BTS *the_bts,
|
|||
* simulate RACH, this sends an Immediate
|
||||
* Assignment Uplink on the AGCH
|
||||
*/
|
||||
the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x73, rach_fn, qta);
|
||||
|
||||
/* get next free TFI */
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
@ -814,7 +829,7 @@ static gprs_rlcmac_ul_tbf *establish_ul_tbf_two_phase_spb(BTS *the_bts,
|
|||
* simulate RACH, this sends an Immediate
|
||||
* Assignment Uplink on the AGCH
|
||||
*/
|
||||
the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x73, rach_fn, qta);
|
||||
|
||||
/* get next free TFI */
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
@ -1249,7 +1264,7 @@ static gprs_rlcmac_ul_tbf *establish_ul_tbf(BTS *the_bts,
|
|||
* simulate RACH, this sends an Immediate
|
||||
* Assignment Uplink on the AGCH
|
||||
*/
|
||||
the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x73, rach_fn, qta);
|
||||
|
||||
/* get next free TFI */
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
@ -1562,7 +1577,7 @@ static gprs_rlcmac_ul_tbf *establish_ul_tbf_two_phase(BTS *the_bts,
|
|||
request_dl_rlc_block(bts, trx_no, ts_no, fn);
|
||||
|
||||
/* simulate RACH, sends an Immediate Assignment Uplink on the AGCH */
|
||||
the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x73, rach_fn, qta);
|
||||
|
||||
/* get next free TFI */
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
@ -1777,8 +1792,7 @@ static void test_immediate_assign_rej_single_block()
|
|||
* simulate RACH, sends an Immediate Assignment
|
||||
* Uplink reject on the AGCH
|
||||
*/
|
||||
rc = the_bts.rcv_rach(0x70, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = bts_handle_rach(&the_bts, 0x70, rach_fn, qta);
|
||||
|
||||
OSMO_ASSERT(rc == -EINVAL);
|
||||
|
||||
|
@ -1807,22 +1821,14 @@ static void test_immediate_assign_rej_multi_block()
|
|||
* simulate RACH, sends an Immediate Assignment Uplink
|
||||
* reject on the AGCH
|
||||
*/
|
||||
rc = the_bts.rcv_rach(0x78, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x79, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7a, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7b, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7c, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7d, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7e, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7f, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = bts_handle_rach(&the_bts, 0x78, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x79, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7a, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7b, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7c, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7d, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7e, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7f, rach_fn, qta);
|
||||
|
||||
OSMO_ASSERT(rc == -EBUSY);
|
||||
|
||||
|
@ -2359,7 +2365,7 @@ static gprs_rlcmac_ul_tbf *tbf_li_decoding(BTS *the_bts,
|
|||
* simulate RACH, this sends an Immediate
|
||||
* Assignment Uplink on the AGCH
|
||||
*/
|
||||
the_bts->rcv_rach(0x73, rach_fn, qta, 0, GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
bts_handle_rach(the_bts, 0x73, rach_fn, qta);
|
||||
|
||||
/* get next free TFI */
|
||||
tfi = the_bts->tfi_find_free(GPRS_RLCMAC_UL_TBF, &trx_no, -1);
|
||||
|
@ -3174,20 +3180,13 @@ static void test_packet_access_rej_prr()
|
|||
/*
|
||||
* Trigger rach till resources(USF) exhaust
|
||||
*/
|
||||
rc = the_bts.rcv_rach(0x78, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x79, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7a, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7b, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7c, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7d, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = the_bts.rcv_rach(0x7e, rach_fn, qta, 0,
|
||||
GSM_L1_BURST_TYPE_ACCESS_0);
|
||||
rc = bts_handle_rach(&the_bts, 0x78, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x79, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7a, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7b, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7c, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7d, rach_fn, qta);
|
||||
rc = bts_handle_rach(&the_bts, 0x7e, rach_fn, qta);
|
||||
|
||||
/* fake a resource request */
|
||||
ulreq.u.MESSAGE_TYPE = MT_PACKET_RESOURCE_REQUEST;
|
||||
|
|
|
@ -1443,7 +1443,7 @@ MSG = 07 01 04 4d 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03 03
|
|||
=== start test_tbf_single_phase ===
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x03 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x03 (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -1464,10 +1464,7 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
Got CS-1 RLC block: R=0, SI=0, TFI=0, CPS=0, RSB=0, rc=184
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) UL DATA TFI=0 received (V(Q)=0 .. V(R)=0)
|
||||
MS (IMSI ): Link quality 12dB (old 12dB) left window [0, 0], modifying uplink CS level: CS-1 -> CS-2
|
||||
|
@ -1515,11 +1512,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) TX: START Immediate Assignment Do
|
|||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) appending 4 bytes
|
||||
=== end test_tbf_single_phase ===
|
||||
=== start test_tbf_two_phase ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -1597,11 +1593,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) starting timer T0 [assignment (PA
|
|||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN) appending 4 bytes
|
||||
=== end test_tbf_two_phase ===
|
||||
=== start test_tbf_ra_update_rach ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -1723,11 +1718,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) need_padding 0 spb_status 0 spb
|
|||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) Copying 1 RLC blocks, 1 BSNs
|
||||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) Copying data unit 0 (BSN 0)
|
||||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) msg block (BSN 0, CS-4): 07 01 00 29 52 41 55 5f 41 43 43 45 50 54 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 00
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654232 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654232 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654232 (17,39,22), SBFn=2654335
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654335 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=1.
|
||||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=FINISHED) poll timeout for FN=2654292, TS=7 (curr FN 2654335)
|
||||
|
@ -1794,11 +1788,10 @@ Modifying MS object, TLLI: 0xf5667788 confirmed
|
|||
New MS: TLLI = 0xf5667788, TA = 7, IMSI = 0011223344, LLC = 1
|
||||
=== end test_tbf_ra_update_rach ===
|
||||
=== start test_tbf_dl_flow_and_rach_two_phase ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -1884,11 +1877,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW) stopping timer T3169 [freeing TBF]
|
|||
PDCH(TS 7, TRX 0): Detaching TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW), 0 TBFs, USFs = 00, TFIs = 00000000.
|
||||
Detaching TBF from MS object, TLLI = 0xf1223344, TBF = TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW)
|
||||
********** UL-TBF ends here **********
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654224 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654224 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654224 (17,31,14), SBFn=2654327
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654327 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -1966,11 +1958,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FLOW) No gaps in received block, last blo
|
|||
New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2
|
||||
=== end test_tbf_dl_flow_and_rach_two_phase ===
|
||||
=== start test_tbf_dl_flow_and_rach_single_phase ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -2058,7 +2049,7 @@ Detaching TBF from MS object, TLLI = 0xf1223344, TBF = TBF(TFI=0 TLLI=0xf1223344
|
|||
********** UL-TBF ends here **********
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x03 Fn=2654275 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x03 (8 bit) Fn=2654275 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -2079,10 +2070,7 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x03, Fn=2654275 (17,31,13)
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
Got CS-1 RLC block: R=0, SI=0, TFI=0, CPS=0, RSB=0, rc=184
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) UL DATA TFI=0 received (V(Q)=0 .. V(R)=0)
|
||||
MS (IMSI ): Link quality 12dB (old 12dB) left window [0, 0], modifying uplink CS level: CS-1 -> CS-2
|
||||
|
@ -2117,11 +2105,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=UL STATE=FINISHED) changes UL ACK state from GPRS_
|
|||
New MS: TLLI = 0xf1223344, TA = 7, IMSI = 0011223344, LLC = 2
|
||||
=== end test_tbf_dl_flow_and_rach_single_phase ===
|
||||
=== start test_tbf_dl_reuse ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -3140,11 +3127,10 @@ Destroying MS object, TLLI = 0x00000000
|
|||
********** DL-TBF ends here **********
|
||||
=== end test_tbf_ws ===
|
||||
=== start test_tbf_egprs_two_phase ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -3232,11 +3218,10 @@ TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN EGPRS) starting timer T0 [assignme
|
|||
TBF(TFI=0 TLLI=0xf1223344 DIR=DL STATE=ASSIGN EGPRS) appending 256 bytes
|
||||
=== end test_tbf_egprs_two_phase ===
|
||||
=== start test_tbf_egprs_two_phase_spb ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -5871,11 +5856,10 @@ Destroying MS object, TLLI = 0xffeeddcc
|
|||
********** DL-TBF ends here **********
|
||||
=== end test_tbf_egprs_spb_dl ===
|
||||
=== start test_tbf_puan_urbb_len ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -6036,11 +6020,10 @@ Destroying MS object, TLLI = 0x00000000
|
|||
********** DL-TBF ends here **********
|
||||
=== end test_tbf_update_ws ===
|
||||
=== start test_tbf_li_decoding ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -6182,7 +6165,7 @@ Destroying MS object, TLLI = 0xffeeddcc
|
|||
********** DL-TBF ends here **********
|
||||
=== end test_tbf_epdan_out_of_rx_window ===
|
||||
=== start test_immediate_assign_rej_multi_block ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x78 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x78 (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6203,11 +6186,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x78, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x79 Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x79 (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6228,11 +6208,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x79, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=1 USF=1
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7a Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=1 USF=1
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7a (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6253,11 +6230,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7a, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=2 USF=2
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7b Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=2 USF=2
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7b (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6278,11 +6252,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7b, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=3 USF=3
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7c Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=3 USF=3
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7c (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6303,11 +6274,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7c, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=4 USF=4
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7d Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=4 USF=4
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7d (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6328,11 +6296,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7d, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=5 USF=5
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7e Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=5 USF=5
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7e (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6353,11 +6318,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7e, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=6 USF=6
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7f Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=6 USF=6
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7f (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -6371,21 +6333,22 @@ Allocating UL TBF: MS_CLASS=0/0
|
|||
- Skipping TS 6, because not enabled
|
||||
- Skipping TS 7, because no USF available
|
||||
[UL] algo A <single> (suggested TRX: -1): failed to allocate a TS, no USF available
|
||||
No PDCH resource sending Immediate Assignment Uplink (AGCH) reject
|
||||
No PDCH resource for Uplink TBF
|
||||
Tx Immediate Assignment Reject on AGCH
|
||||
=== end test_immediate_assign_rej_multi_block ===
|
||||
Destroying MS object, TLLI = 0x00000000
|
||||
=== start test_immediate_assign_rej_single_block ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x70 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x70 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
No PDCH available.
|
||||
No PDCH resource for single block allocation.sending Immediate Assignment Uplink (AGCH) reject
|
||||
No PDCH resource for single block allocation: rc=-22
|
||||
Tx Immediate Assignment Reject on AGCH
|
||||
=== end test_immediate_assign_rej_single_block ===
|
||||
=== start test_tbf_egprs_two_phase_puan ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x73 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x73 (8 bit) Fn=2654167 qta=31
|
||||
MS requests single block allocation
|
||||
RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x73, Fn=2654167 (17,25,9), SBFn=2654270
|
||||
TX: Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Allocated a single block at SBFn=2654270 TRX=0 TS=7
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=-1 USF=7
|
||||
Searching for first unallocated TFI: TRX=0
|
||||
Found TFI=0.
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
|
@ -7815,7 +7778,7 @@ TBF(TFI=0 TLLI=0xffeeddcc DIR=DL STATE=FLOW) appending 100 bytes
|
|||
packet reject: 40 84 7f f7 6e e6 41 4b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b 2b
|
||||
=== end test_packet_access_rej_epdan ===
|
||||
=== start test_packet_access_rej_prr ===
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x78 Fn=2654167 qta=31 is_11bit=0:
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x78 (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7836,11 +7799,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x78, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=0 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x79 Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=0 USF=0
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x79 (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7861,11 +7821,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x79, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=1 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=1 USF=1
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7a Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=1 USF=1
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7a (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7886,11 +7843,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7a, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=2 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=2 USF=2
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7b Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=2 USF=2
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7b (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7911,11 +7865,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7b, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=3 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=3 USF=3
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7c Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=3 USF=3
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7c (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7936,11 +7887,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7c, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=4 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=4 USF=4
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7d Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=4 USF=4
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7d (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7961,11 +7909,8 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7d, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=5 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=5 USF=5
|
||||
MS requests UL TBF on RACH, so we provide one: ra=0x7e Fn=2654167 qta=31 is_11bit=0:
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=5 USF=5
|
||||
MS requests Uplink resource on CCCH/RACH: ra=0x7e (8 bit) Fn=2654167 qta=31
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
********** UL-TBF starts here **********
|
||||
Allocating UL TBF: MS_CLASS=0/0
|
||||
|
@ -7986,10 +7931,7 @@ Modifying MS object, TLLI = 0x00000000, TA 220 -> 7
|
|||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=NULL) changes state from NULL to FLOW
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) set ass. type CCCH [prev CCCH:0, PACCH:0]
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) starting timer T3169 [RACH (new UL-TBF)] with 5 sec. 0 microsec, cur_fn=0
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) [UPLINK] START
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) RX: [PCU <- BTS] RACH qbit-ta=31 ra=0x7e, Fn=2654167 (17,25,9)
|
||||
TBF(TFI=6 TLLI=0x00000000 DIR=UL STATE=FLOW) TX: START Immediate Assignment Uplink (AGCH)
|
||||
- TRX=0 (0) TS=7 TA=7 TSC=0 TFI=6 USF=6
|
||||
Tx Immediate Assignment on AGCH: TRX=0 (ARFCN 0) TS=7 TA=7 TSC=0 TFI=6 USF=6
|
||||
+++++++++++++++++++++++++ RX : Uplink Control Block +++++++++++++++++++++++++
|
||||
------------------------- RX : Uplink Control Block -------------------------
|
||||
Creating MS object, TLLI = 0x00000000
|
||||
|
|
Loading…
Reference in New Issue