From 46fbfceac6dfa6641d3e00c1a102622550bb7190 Mon Sep 17 00:00:00 2001 From: Max Date: Wed, 1 Nov 2017 19:22:25 +0100 Subject: [PATCH] Add tests for find_multi_slots() * make function public * add tests Change-Id: I4174703808335c19341cd5b5f4422496d958967f --- src/gprs_rlcmac.h | 3 + src/gprs_rlcmac_ts_alloc.cpp | 2 +- tests/Makefile.am | 12 +- tests/alloc/MslotTest.cpp | 177 ++++++ tests/alloc/MslotTest.ok | 1156 ++++++++++++++++++++++++++++++++++ tests/testsuite.at | 6 + 6 files changed, 1353 insertions(+), 3 deletions(-) create mode 100644 tests/alloc/MslotTest.cpp create mode 100644 tests/alloc/MslotTest.ok diff --git a/src/gprs_rlcmac.h b/src/gprs_rlcmac.h index aa773fc5..64b6d6c8 100644 --- a/src/gprs_rlcmac.h +++ b/src/gprs_rlcmac.h @@ -62,6 +62,9 @@ struct gprs_rlcmac_cs { uint8_t block_payload; }; +/* TS allocation internal functions */ +int find_multi_slots(struct gprs_rlcmac_trx *trx, uint8_t mslot_class, uint8_t *ul_slots, uint8_t *dl_slots); + int gprs_rlcmac_received_lost(struct gprs_rlcmac_dl_tbf *tbf, uint16_t received, uint16_t lost); diff --git a/src/gprs_rlcmac_ts_alloc.cpp b/src/gprs_rlcmac_ts_alloc.cpp index 5e670d7e..471b601a 100644 --- a/src/gprs_rlcmac_ts_alloc.cpp +++ b/src/gprs_rlcmac_ts_alloc.cpp @@ -443,7 +443,7 @@ int alloc_algorithm_a(struct gprs_rlcmac_bts *bts, return 0; } -static int find_multi_slots(struct gprs_rlcmac_trx *trx, uint8_t mslot_class, uint8_t *ul_slots, uint8_t *dl_slots) +int find_multi_slots(struct gprs_rlcmac_trx *trx, uint8_t mslot_class, uint8_t *ul_slots, uint8_t *dl_slots) { uint8_t Tx, Sum; /* Maximum Number of Slots: RX, Tx, Sum Rx+Tx */ uint8_t Tta, Ttb, Tra, Trb; /* Minimum Number of Slots */ diff --git a/tests/Makefile.am b/tests/Makefile.am index 04136f5f..1595a07e 100644 --- a/tests/Makefile.am +++ b/tests/Makefile.am @@ -1,7 +1,7 @@ AM_CPPFLAGS = $(STD_DEFINES_AND_INCLUDES) $(LIBOSMOCORE_CFLAGS) $(LIBOSMOGB_CFLAGS) $(LIBOSMOGSM_CFLAGS) -I$(top_srcdir)/src/ -I$(top_srcdir)/include/ AM_LDFLAGS = -lrt -check_PROGRAMS = rlcmac/RLCMACTest alloc/AllocTest tbf/TbfTest types/TypesTest ms/MsTest llist/LListTest llc/LlcTest codel/codel_test edge/EdgeTest bitcomp/BitcompTest fn/FnTest +check_PROGRAMS = rlcmac/RLCMACTest alloc/AllocTest alloc/MslotTest tbf/TbfTest types/TypesTest ms/MsTest llist/LListTest llc/LlcTest codel/codel_test edge/EdgeTest bitcomp/BitcompTest fn/FnTest noinst_PROGRAMS = emu/pcu_emu rlcmac_RLCMACTest_SOURCES = rlcmac/RLCMACTest.cpp @@ -18,6 +18,14 @@ alloc_AllocTest_LDADD = \ $(LIBOSMOCORE_LIBS) \ $(COMMON_LA) +alloc_MslotTest_SOURCES = alloc/MslotTest.cpp +alloc_MslotTest_LDADD = \ + $(top_builddir)/src/libgprs.la \ + $(LIBOSMOGB_LIBS) \ + $(LIBOSMOGSM_LIBS) \ + $(LIBOSMOCORE_LIBS) \ + $(COMMON_LA) + tbf_TbfTest_SOURCES = tbf/TbfTest.cpp tbf_TbfTest_LDADD = \ $(top_builddir)/src/libgprs.la \ @@ -124,7 +132,7 @@ EXTRA_DIST = \ tbf/TbfTest.ok tbf/TbfTest.err \ bitcomp/BitcompTest.ok bitcomp/BitcompTest.err \ types/TypesTest.ok types/TypesTest.err \ - ms/MsTest.ok ms/MsTest.err \ + ms/MsTest.ok ms/MsTest.err alloc/MslotTest.ok \ llc/LlcTest.ok llc/LlcTest.err \ llist/LListTest.ok llist/LListTest.err \ codel/codel_test.ok \ diff --git a/tests/alloc/MslotTest.cpp b/tests/alloc/MslotTest.cpp new file mode 100644 index 00000000..1fa28bf5 --- /dev/null +++ b/tests/alloc/MslotTest.cpp @@ -0,0 +1,177 @@ +/* MslotTest.cpp + * + * Copyright (C) 2017 by sysmocom - s.f.m.c. GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#include "gprs_rlcmac.h" +#include "gprs_debug.h" +#include "tbf.h" +#include "bts.h" + +#include +#include +#include + +extern "C" { +#include +#include +#include +#include +} + +/* globals used by the code */ +void *tall_pcu_ctx; +int16_t spoof_mnc = 0, spoof_mcc = 0; + +static inline void test_all_classes(struct gprs_rlcmac_trx *trx, bool clear_masks) +{ + int i, rc; + uint8_t dl_slots = 0, ul_slots = 0; + + for (i = 0; i < 64; i++) { + rc = find_multi_slots(trx, i, &ul_slots, &dl_slots); + + printf(" [%s] multislot class %3u - UL: " OSMO_BIT_SPEC " DL: " OSMO_BIT_SPEC " [%d]\n", + clear_masks ? "SEQ" : "ACC", i, OSMO_BIT_PRINT(ul_slots), OSMO_BIT_PRINT(dl_slots), rc); + + if (rc == -EINVAL) + return; + + if (clear_masks) { + dl_slots = 0; + ul_slots = 0; + } + } +} + +static inline void test_multislot_total_ascending(bool seq) +{ + BTS the_bts; + struct gprs_rlcmac_bts *bts; + struct gprs_rlcmac_trx *trx; + int i; + + printf("%s(): %s\n", __func__, seq ? "sequential" : "accumulative"); + + bts = the_bts.bts_data(); + + trx = &bts->trx[0]; + + for (i = 0; i < 8; i++) { + printf(" Enabled PDCH %u for multislot tests...\n", i); + trx->pdch[i].enable(); + + test_all_classes(trx, seq); + } +} + +static inline void test_multislot_total_descending(bool seq) +{ + BTS the_bts; + struct gprs_rlcmac_bts *bts; + struct gprs_rlcmac_trx *trx; + int i; + + printf("%s(): %s\n", __func__, seq ? "sequential" : "accumulative"); + + bts = the_bts.bts_data(); + + trx = &bts->trx[0]; + + for (i = 7; i >= 0; i--) { + printf(" Enabled PDCH %u for multislot tests...\n", i); + trx->pdch[i].enable(); + + test_all_classes(trx, seq); + } +} + +static inline void test_multislot_middle(bool seq) +{ + BTS the_bts; + struct gprs_rlcmac_bts *bts; + struct gprs_rlcmac_trx *trx; + + printf("%s(): %s\n", __func__, seq ? "sequential" : "accumulative"); + + bts = the_bts.bts_data(); + + trx = &bts->trx[0]; + + trx->pdch[2].enable(); + trx->pdch[3].enable(); + trx->pdch[4].enable(); + + test_all_classes(trx, seq); +} + +static inline void test_multislot_ends(bool seq) +{ + BTS the_bts; + struct gprs_rlcmac_bts *bts; + struct gprs_rlcmac_trx *trx; + + printf("%s(): %s\n", __func__, seq ? "sequential" : "accumulative"); + + bts = the_bts.bts_data(); + + trx = &bts->trx[0]; + + trx->pdch[0].enable(); + trx->pdch[7].enable(); + + test_all_classes(trx, seq); +} + + +int main(int argc, char **argv) +{ + tall_pcu_ctx = talloc_named_const(NULL, 1, "MslotTest context"); + if (!tall_pcu_ctx) + abort(); + + msgb_talloc_ctx_init(tall_pcu_ctx, 0); + + osmo_init_logging(&gprs_log_info); + log_set_use_color(osmo_stderr_target, 0); + log_set_print_filename(osmo_stderr_target, 0); + log_set_log_level(osmo_stderr_target, LOGL_DEBUG); + + test_multislot_total_ascending(true); + test_multislot_total_ascending(false); + + test_multislot_total_descending(true); + test_multislot_total_descending(false); + + test_multislot_middle(true); + test_multislot_middle(false); + + test_multislot_ends(true); + test_multislot_ends(false); + + return EXIT_SUCCESS; +} + +/* + * stubs that should not be reached + */ +extern "C" { +void l1if_pdch_req() { abort(); } +void l1if_connect_pdch() { abort(); } +void l1if_close_pdch() { abort(); } +void l1if_open_pdch() { abort(); } +} diff --git a/tests/alloc/MslotTest.ok b/tests/alloc/MslotTest.ok new file mode 100644 index 00000000..0cd50c81 --- /dev/null +++ b/tests/alloc/MslotTest.ok @@ -0,0 +1,1156 @@ +test_multislot_total_ascending(): sequential + Enabled PDCH 0 for multislot tests... + [SEQ] multislot class 0 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 3 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 4 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 5 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 6 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 7 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 8 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 9 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 10 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 11 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 12 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 13 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 14 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 15 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 16 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 17 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 18 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 19 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 20 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 21 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 22 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 23 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 24 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 25 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 26 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 27 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 28 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 29 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 1 for multislot tests... + [SEQ] multislot class 0 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: .......1 DL: ......11 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 7 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 8 - UL: .......1 DL: ......11 [0] + [SEQ] multislot class 9 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 10 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 11 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 12 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 13 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 14 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 15 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 16 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 17 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 18 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 19 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 20 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 21 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 22 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 23 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 24 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 25 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 26 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 27 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 28 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 29 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 2 for multislot tests... + [SEQ] multislot class 0 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 7 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 8 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 9 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 10 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 11 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 12 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 15 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 16 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 17 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 18 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 19 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 20 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 21 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 22 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 23 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 24 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 25 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 26 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 27 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 28 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 29 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 3 for multislot tests... + [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 7 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 8 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 9 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 10 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 11 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 12 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 16 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 17 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 18 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 19 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 20 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 21 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 22 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 23 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 24 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 25 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 26 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 4 for multislot tests... + [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 7 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 8 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 9 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 10 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 11 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 12 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 16 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 17 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 18 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 19 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 20 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 21 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 22 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 23 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 24 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 25 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 26 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 5 for multislot tests... + [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 7 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 8 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 9 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 10 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 11 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 12 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 16 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 17 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 18 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 19 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 20 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 21 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 22 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 23 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 24 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 25 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 26 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 6 for multislot tests... + [SEQ] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 3 - UL: ......1. DL: ......11 [0] + [SEQ] multislot class 4 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 7 - UL: ......1. DL: .....111 [0] + [SEQ] multislot class 8 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 9 - UL: .....11. DL: .....111 [0] + [SEQ] multislot class 10 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 11 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 12 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 16 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 17 - UL: .1111111 DL: .1111111 [0] + [SEQ] multislot class 18 - UL: .1111111 DL: .1111111 [0] + [SEQ] multislot class 19 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 20 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 21 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 22 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 23 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 24 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 25 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 26 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 27 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 28 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 29 - UL: .....1.. DL: ....1111 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 7 for multislot tests... + [SEQ] multislot class 0 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 3 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 4 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 7 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 8 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 9 - UL: ......11 DL: 1.....11 [0] + [SEQ] multislot class 10 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 11 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 12 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 16 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 17 - UL: .1111111 DL: .1111111 [0] + [SEQ] multislot class 18 - UL: 11111111 DL: 11111111 [0] + [SEQ] multislot class 19 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 20 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 21 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 22 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 23 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 24 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 25 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 26 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 27 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 28 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 29 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] +test_multislot_total_ascending(): accumulative + Enabled PDCH 0 for multislot tests... + [ACC] multislot class 0 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 2 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 3 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 4 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 5 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 6 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 7 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 8 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 9 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 10 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 11 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 12 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 13 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 14 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 15 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 16 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 17 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 18 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 19 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 20 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 21 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 22 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 23 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 24 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 25 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 26 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + Enabled PDCH 1 for multislot tests... + [ACC] multislot class 0 - UL: ......11 DL: ......11 [0] + [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 2 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 3 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 4 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 5 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 6 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 7 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 8 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 9 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 10 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 11 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 12 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 13 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 14 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 15 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 16 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 17 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 18 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 19 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 20 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 21 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 22 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 23 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 24 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 25 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 26 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] + Enabled PDCH 2 for multislot tests... + [ACC] multislot class 0 - UL: .....11. DL: .....111 [0] + [ACC] multislot class 1 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 2 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 3 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 4 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 5 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 6 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 7 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 8 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 9 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 10 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 11 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 12 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 13 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 14 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 15 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 16 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 17 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 18 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 19 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 20 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 21 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 22 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 23 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 24 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 25 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 26 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 27 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 28 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 29 - UL: ......1. DL: ......1. [0] + [ACC] multislot class 30 - UL: ......1. DL: ......1. [-22] + Enabled PDCH 3 for multislot tests... + [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 2 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 3 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 4 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 5 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 6 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 7 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 8 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 9 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 10 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 11 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 12 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 13 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 14 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 15 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 16 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 17 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 18 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 19 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 20 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 21 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 22 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 23 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 24 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 25 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 26 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + Enabled PDCH 4 for multislot tests... + [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 2 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 3 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 4 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 5 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 6 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 7 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 8 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 9 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 10 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 11 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 12 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 13 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 14 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 15 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 16 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 17 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 18 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 19 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 20 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 21 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 22 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 23 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 24 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 25 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 26 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + Enabled PDCH 5 for multislot tests... + [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 2 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 3 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 4 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 5 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 6 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 7 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 8 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 9 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 10 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 11 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 12 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 13 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 14 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 15 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 16 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 17 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 18 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 19 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 20 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 21 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 22 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 23 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 24 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 25 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 26 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + Enabled PDCH 6 for multislot tests... + [ACC] multislot class 0 - UL: .....1.. DL: ....1111 [0] + [ACC] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 2 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 3 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 4 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 5 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 6 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 7 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 8 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 9 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 10 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 11 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 12 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 13 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 14 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 15 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 16 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 17 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 18 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 19 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 20 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 21 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 22 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 23 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 24 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 25 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 26 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 27 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 28 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 29 - UL: .....1.. DL: .....1.. [0] + [ACC] multislot class 30 - UL: .....1.. DL: .....1.. [-22] + Enabled PDCH 7 for multislot tests... + [ACC] multislot class 0 - UL: .......1 DL: 11....11 [0] + [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 2 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 3 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 4 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 5 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 6 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 7 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 8 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 9 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 10 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 11 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 12 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 13 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 14 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 15 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 16 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 17 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 18 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 19 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 20 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 21 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 22 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 23 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 24 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 25 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 26 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] +test_multislot_total_descending(): sequential + Enabled PDCH 7 for multislot tests... + [SEQ] multislot class 0 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 1 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 2 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 3 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 4 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 5 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 6 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 7 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 8 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 9 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 10 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 11 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 12 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 13 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 14 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 15 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 16 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 17 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 18 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 19 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 20 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 21 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 22 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 23 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 24 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 25 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 26 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 27 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 28 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 29 - UL: 1....... DL: 1....... [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 6 for multislot tests... + [SEQ] multislot class 0 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 1 - UL: .1...... DL: .1...... [0] + [SEQ] multislot class 2 - UL: 1....... DL: 11...... [0] + [SEQ] multislot class 3 - UL: 1....... DL: 11...... [0] + [SEQ] multislot class 4 - UL: .1...... DL: 11...... [0] + [SEQ] multislot class 5 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 6 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 7 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 8 - UL: .1...... DL: 11...... [0] + [SEQ] multislot class 9 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 10 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 11 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 12 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 13 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 14 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 15 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 16 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 17 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 18 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 19 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 20 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 21 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 22 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 23 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 24 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 25 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 26 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 27 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 28 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 29 - UL: 11...... DL: 11...... [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 5 for multislot tests... + [SEQ] multislot class 0 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 1 - UL: ..1..... DL: ..1..... [0] + [SEQ] multislot class 2 - UL: .1...... DL: .11..... [0] + [SEQ] multislot class 3 - UL: .1...... DL: .11..... [0] + [SEQ] multislot class 4 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 5 - UL: .11..... DL: .11..... [0] + [SEQ] multislot class 6 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 7 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 8 - UL: .1...... DL: 111..... [0] + [SEQ] multislot class 9 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 10 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 11 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 12 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 13 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 14 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 15 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 16 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 17 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 18 - UL: 111..... DL: 111..... [0] + [SEQ] multislot class 19 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 20 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 21 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 22 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 23 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 24 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 25 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 26 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 27 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 28 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 29 - UL: 11...... DL: 111..... [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 4 for multislot tests... + [SEQ] multislot class 0 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 1 - UL: ...1.... DL: ...1.... [0] + [SEQ] multislot class 2 - UL: ..1..... DL: ..11.... [0] + [SEQ] multislot class 3 - UL: ..1..... DL: ..11.... [0] + [SEQ] multislot class 4 - UL: ..1..... DL: .111.... [0] + [SEQ] multislot class 5 - UL: ..11.... DL: ..11.... [0] + [SEQ] multislot class 6 - UL: ..1..... DL: .111.... [0] + [SEQ] multislot class 7 - UL: ..1..... DL: .111.... [0] + [SEQ] multislot class 8 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 9 - UL: .11..... DL: .111.... [0] + [SEQ] multislot class 10 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 11 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 12 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 13 - UL: .111.... DL: .111.... [0] + [SEQ] multislot class 14 - UL: 1111.... DL: 1111.... [0] + [SEQ] multislot class 15 - UL: 1111.... DL: 1111.... [0] + [SEQ] multislot class 16 - UL: 1111.... DL: 1111.... [0] + [SEQ] multislot class 17 - UL: 1111.... DL: 1111.... [0] + [SEQ] multislot class 18 - UL: 1111.... DL: 1111.... [0] + [SEQ] multislot class 19 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 20 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 21 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 22 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 23 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 24 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 25 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 26 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 27 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 28 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 29 - UL: .1...... DL: 1111.... [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 3 for multislot tests... + [SEQ] multislot class 0 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 1 - UL: ....1... DL: ....1... [0] + [SEQ] multislot class 2 - UL: ...1.... DL: ...11... [0] + [SEQ] multislot class 3 - UL: ...1.... DL: ...11... [0] + [SEQ] multislot class 4 - UL: ...1.... DL: ..111... [0] + [SEQ] multislot class 5 - UL: ...11... DL: ...11... [0] + [SEQ] multislot class 6 - UL: ...1.... DL: ..111... [0] + [SEQ] multislot class 7 - UL: ...1.... DL: ..111... [0] + [SEQ] multislot class 8 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 9 - UL: ..11.... DL: ..111... [0] + [SEQ] multislot class 10 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 11 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 12 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 13 - UL: ..111... DL: ..111... [0] + [SEQ] multislot class 14 - UL: .1111... DL: .1111... [0] + [SEQ] multislot class 15 - UL: 11111... DL: 11111... [0] + [SEQ] multislot class 16 - UL: 11111... DL: 11111... [0] + [SEQ] multislot class 17 - UL: 11111... DL: 11111... [0] + [SEQ] multislot class 18 - UL: 11111... DL: 11111... [0] + [SEQ] multislot class 19 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 20 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 21 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 22 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 23 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 24 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 25 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 26 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 27 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 28 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 29 - UL: ..1..... DL: .1111... [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 2 for multislot tests... + [SEQ] multislot class 0 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [SEQ] multislot class 2 - UL: ....1... DL: ....11.. [0] + [SEQ] multislot class 3 - UL: ....1... DL: ....11.. [0] + [SEQ] multislot class 4 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 5 - UL: ....11.. DL: ....11.. [0] + [SEQ] multislot class 6 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 7 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 8 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 9 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 10 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 11 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 12 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 13 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 14 - UL: ..1111.. DL: ..1111.. [0] + [SEQ] multislot class 15 - UL: .11111.. DL: .11111.. [0] + [SEQ] multislot class 16 - UL: 111111.. DL: 111111.. [0] + [SEQ] multislot class 17 - UL: 111111.. DL: 111111.. [0] + [SEQ] multislot class 18 - UL: 111111.. DL: 111111.. [0] + [SEQ] multislot class 19 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 20 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 21 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 22 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 23 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 24 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 25 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 26 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 27 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 28 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 29 - UL: ...1.... DL: ..1111.. [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 1 for multislot tests... + [SEQ] multislot class 0 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 1 - UL: ......1. DL: ......1. [0] + [SEQ] multislot class 2 - UL: .....1.. DL: .....11. [0] + [SEQ] multislot class 3 - UL: .....1.. DL: .....11. [0] + [SEQ] multislot class 4 - UL: .....1.. DL: ....111. [0] + [SEQ] multislot class 5 - UL: .....11. DL: .....11. [0] + [SEQ] multislot class 6 - UL: .....1.. DL: ....111. [0] + [SEQ] multislot class 7 - UL: .....1.. DL: ....111. [0] + [SEQ] multislot class 8 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 9 - UL: ....11.. DL: ....111. [0] + [SEQ] multislot class 10 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 11 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 12 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 13 - UL: ....111. DL: ....111. [0] + [SEQ] multislot class 14 - UL: ...1111. DL: ...1111. [0] + [SEQ] multislot class 15 - UL: ..11111. DL: ..11111. [0] + [SEQ] multislot class 16 - UL: .111111. DL: .111111. [0] + [SEQ] multislot class 17 - UL: 1111111. DL: 1111111. [0] + [SEQ] multislot class 18 - UL: 1111111. DL: 1111111. [0] + [SEQ] multislot class 19 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 20 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 21 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 22 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 23 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 24 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 25 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 26 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 27 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 28 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 29 - UL: ....1... DL: ...1111. [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] + Enabled PDCH 0 for multislot tests... + [SEQ] multislot class 0 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 3 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 4 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 5 - UL: ......11 DL: ......11 [0] + [SEQ] multislot class 6 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 7 - UL: .......1 DL: 1.....11 [0] + [SEQ] multislot class 8 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 9 - UL: ......11 DL: 1.....11 [0] + [SEQ] multislot class 10 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 11 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 12 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 13 - UL: .....111 DL: .....111 [0] + [SEQ] multislot class 14 - UL: ....1111 DL: ....1111 [0] + [SEQ] multislot class 15 - UL: ...11111 DL: ...11111 [0] + [SEQ] multislot class 16 - UL: ..111111 DL: ..111111 [0] + [SEQ] multislot class 17 - UL: .1111111 DL: .1111111 [0] + [SEQ] multislot class 18 - UL: 11111111 DL: 11111111 [0] + [SEQ] multislot class 19 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 20 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 21 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 22 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 23 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 24 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 25 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 26 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 27 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 28 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 29 - UL: .......1 DL: 11....11 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] +test_multislot_total_descending(): accumulative + Enabled PDCH 7 for multislot tests... + [ACC] multislot class 0 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 1 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 2 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 3 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 4 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 5 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 6 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 7 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 8 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 9 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 10 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 11 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 12 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 13 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 14 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 15 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 16 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 17 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 18 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 19 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 20 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 21 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 22 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 23 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 24 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 25 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 26 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 27 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 28 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 29 - UL: 1....... DL: 1....... [0] + [ACC] multislot class 30 - UL: 1....... DL: 1....... [-22] + Enabled PDCH 6 for multislot tests... + [ACC] multislot class 0 - UL: 11...... DL: 11...... [0] + [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 2 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 3 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 4 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 5 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 6 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 7 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 8 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 9 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 10 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 11 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 12 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 13 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 14 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 15 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 16 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 17 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 18 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 19 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 20 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 21 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 22 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 23 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 24 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 25 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 26 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + Enabled PDCH 5 for multislot tests... + [ACC] multislot class 0 - UL: 11...... DL: 111..... [0] + [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 2 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 3 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 4 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 5 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 6 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 7 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 8 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 9 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 10 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 11 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 12 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 13 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 14 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 15 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 16 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 17 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 18 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 19 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 20 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 21 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 22 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 23 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 24 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 25 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 26 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + Enabled PDCH 4 for multislot tests... + [ACC] multislot class 0 - UL: .1...... DL: 1111.... [0] + [ACC] multislot class 1 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 2 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 3 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 4 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 5 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 6 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 7 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 8 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 9 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 10 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 11 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 12 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 13 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 14 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 15 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 16 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 17 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 18 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 19 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 20 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 21 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 22 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 23 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 24 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 25 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 26 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 27 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 28 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 29 - UL: .1...... DL: .1...... [0] + [ACC] multislot class 30 - UL: .1...... DL: .1...... [-22] + Enabled PDCH 3 for multislot tests... + [ACC] multislot class 0 - UL: ..1..... DL: .1111... [0] + [ACC] multislot class 1 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 2 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 3 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 4 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 5 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 6 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 7 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 8 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 9 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 10 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 11 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 12 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 13 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 14 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 15 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 16 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 17 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 18 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 19 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 20 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 21 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 22 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 23 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 24 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 25 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 26 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 27 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 28 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 29 - UL: ..1..... DL: ..1..... [0] + [ACC] multislot class 30 - UL: ..1..... DL: ..1..... [-22] + Enabled PDCH 2 for multislot tests... + [ACC] multislot class 0 - UL: ...1.... DL: ..1111.. [0] + [ACC] multislot class 1 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 2 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 3 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 4 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 5 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 6 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 7 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 8 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 9 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 10 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 11 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 12 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 13 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 14 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 15 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 16 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 17 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 18 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 19 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 20 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 21 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 22 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 23 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 24 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 25 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 26 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 27 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 28 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 29 - UL: ...1.... DL: ...1.... [0] + [ACC] multislot class 30 - UL: ...1.... DL: ...1.... [-22] + Enabled PDCH 1 for multislot tests... + [ACC] multislot class 0 - UL: ....1... DL: ...1111. [0] + [ACC] multislot class 1 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 2 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 3 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 4 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 5 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 6 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 7 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 8 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 9 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 10 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 11 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 12 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 13 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 14 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 15 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 16 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 17 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 18 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 19 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 20 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 21 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 22 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 23 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 24 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 25 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 26 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 27 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 28 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 29 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 30 - UL: ....1... DL: ....1... [-22] + Enabled PDCH 0 for multislot tests... + [ACC] multislot class 0 - UL: .......1 DL: 11....11 [0] + [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 2 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 3 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 4 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 5 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 6 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 7 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 8 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 9 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 10 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 11 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 12 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 13 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 14 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 15 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 16 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 17 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 18 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 19 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 20 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 21 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 22 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 23 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 24 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 25 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 26 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] +test_multislot_middle(): sequential + [SEQ] multislot class 0 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 1 - UL: .....1.. DL: .....1.. [0] + [SEQ] multislot class 2 - UL: ....1... DL: ....11.. [0] + [SEQ] multislot class 3 - UL: ....1... DL: ....11.. [0] + [SEQ] multislot class 4 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 5 - UL: ....11.. DL: ....11.. [0] + [SEQ] multislot class 6 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 7 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 8 - UL: ....1... DL: ...111.. [0] + [SEQ] multislot class 9 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 10 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 11 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 12 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 13 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 14 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 15 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 16 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 17 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 18 - UL: ...111.. DL: ...111.. [0] + [SEQ] multislot class 19 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 20 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 21 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 22 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 23 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 24 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 25 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 26 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 27 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 28 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 29 - UL: ...11... DL: ...111.. [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] +test_multislot_middle(): accumulative + [ACC] multislot class 0 - UL: ...11... DL: ...111.. [0] + [ACC] multislot class 1 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 2 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 3 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 4 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 5 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 6 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 7 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 8 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 9 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 10 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 11 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 12 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 13 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 14 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 15 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 16 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 17 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 18 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 19 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 20 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 21 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 22 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 23 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 24 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 25 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 26 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 27 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 28 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 29 - UL: ....1... DL: ....1... [0] + [ACC] multislot class 30 - UL: ....1... DL: ....1... [-22] +test_multislot_ends(): sequential + [SEQ] multislot class 0 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 1 - UL: .......1 DL: .......1 [0] + [SEQ] multislot class 2 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 3 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 4 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 5 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 6 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 7 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 8 - UL: .......1 DL: 1......1 [0] + [SEQ] multislot class 9 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 10 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 11 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 12 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 13 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 14 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 15 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 16 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 17 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 18 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 19 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 20 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 21 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 22 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 23 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 24 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 25 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 26 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 27 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 28 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 29 - UL: 1......1 DL: 1......1 [0] + [SEQ] multislot class 30 - UL: ........ DL: ........ [-22] +test_multislot_ends(): accumulative + [ACC] multislot class 0 - UL: 1......1 DL: 1......1 [0] + [ACC] multislot class 1 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 2 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 3 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 4 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 5 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 6 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 7 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 8 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 9 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 10 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 11 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 12 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 13 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 14 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 15 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 16 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 17 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 18 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 19 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 20 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 21 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 22 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 23 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 24 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 25 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 26 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 27 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 28 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 29 - UL: .......1 DL: .......1 [0] + [ACC] multislot class 30 - UL: .......1 DL: .......1 [-22] diff --git a/tests/testsuite.at b/tests/testsuite.at index d8f8f9a9..86f45a82 100644 --- a/tests/testsuite.at +++ b/tests/testsuite.at @@ -9,6 +9,12 @@ cat $abs_srcdir/rlcmac/RLCMACTest.err > experr AT_CHECK([$OSMO_QEMU $abs_top_builddir/tests/rlcmac/RLCMACTest], [0], [expout], [experr]) AT_CLEANUP +AT_SETUP([multi_slot]) +AT_KEYWORDS([multi_slot]) +cat $abs_srcdir/alloc/MslotTest.ok > expout +AT_CHECK([$OSMO_QEMU $abs_top_builddir/tests/alloc/MslotTest], [0], [expout], [ignore]) +AT_CLEANUP + AT_SETUP([ts_alloc]) AT_KEYWORDS([ts_alloc]) cat $abs_srcdir/alloc/AllocTest.ok > expout