169 lines
4.0 KiB
C
169 lines
4.0 KiB
C
#ifndef L1_IF_H_TRX
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#define L1_IF_H_TRX
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/* These types define the different channels on a multiframe.
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* Each channel has queues and can be activated individually.
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*/
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enum trx_chan_type {
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TRXC_IDLE = 0,
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TRXC_FCCH,
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TRXC_SCH,
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TRXC_BCCH,
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TRXC_RACH,
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TRXC_CCCH,
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TRXC_TCHF,
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TRXC_TCHH_0,
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TRXC_TCHH_1,
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TRXC_SDCCH4_0,
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TRXC_SDCCH4_1,
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TRXC_SDCCH4_2,
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TRXC_SDCCH4_3,
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TRXC_SDCCH8_0,
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TRXC_SDCCH8_1,
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TRXC_SDCCH8_2,
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TRXC_SDCCH8_3,
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TRXC_SDCCH8_4,
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TRXC_SDCCH8_5,
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TRXC_SDCCH8_6,
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TRXC_SDCCH8_7,
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TRXC_SACCHTF,
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TRXC_SACCHTH_0,
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TRXC_SACCHTH_1,
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TRXC_SACCH4_0,
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TRXC_SACCH4_1,
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TRXC_SACCH4_2,
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TRXC_SACCH4_3,
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TRXC_SACCH8_0,
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TRXC_SACCH8_1,
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TRXC_SACCH8_2,
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TRXC_SACCH8_3,
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TRXC_SACCH8_4,
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TRXC_SACCH8_5,
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TRXC_SACCH8_6,
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TRXC_SACCH8_7,
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TRXC_PDTCH,
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TRXC_PTCCH,
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_TRX_CHAN_MAX
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};
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/* States each channel on a multiframe */
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struct trx_chan_state {
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/* scheduler */
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uint8_t active; /* Channel is active */
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ubit_t *dl_bursts; /* burst buffer for TX */
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sbit_t *ul_bursts; /* burst buffer for RX */
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uint32_t ul_first_fn; /* fn of first burst */
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uint8_t ul_mask; /* mask of received bursts */
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/* RSSI */
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uint8_t rssi_num; /* number of RSSI values */
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float rssi_sum; /* sum of RSSI values */
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/* loss detection */
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uint8_t lost; /* (SACCH) loss detection */
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/* mode */
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uint8_t rsl_cmode, tch_mode; /* mode for TCH channels */
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/* AMR */
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uint8_t codec[4]; /* 4 possible codecs for amr */
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int codecs; /* number of possible codecs */
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float ber_sum; /* sum of bit error rates */
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int ber_num; /* number of bit error rates */
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uint8_t ul_ft; /* current uplink FT index */
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uint8_t dl_ft; /* current downlink FT index */
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uint8_t ul_cmr; /* current uplink CMR index */
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uint8_t dl_cmr; /* current downlink CMR index */
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uint8_t amr_loop; /* if AMR loop is enabled */
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/* TCH/H */
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uint8_t dl_ongoing_facch; /* FACCH/H on downlink */
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uint8_t ul_ongoing_facch; /* FACCH/H on uplink */
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/* encryption */
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int ul_encr_algo; /* A5/x encry algo downlink */
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int dl_encr_algo; /* A5/x encry algo uplink */
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int ul_encr_key_len;
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int dl_encr_key_len;
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uint8_t ul_encr_key[8];
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uint8_t dl_encr_key[8];
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/* measurements */
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struct {
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uint8_t clock; /* cyclic clock counter */
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int8_t rssi[32]; /* last RSSI values */
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int rssi_count; /* received RSSI values */
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int rssi_valid_count; /* number of stored value */
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int rssi_got_burst; /* any burst received so far */
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float toa_sum; /* sum of TOA values */
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int toa_num; /* number of TOA value */
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} meas;
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};
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struct trx_config {
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uint8_t poweron; /* poweron(1) or poweroff(0) */
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int poweron_sent;
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int arfcn_valid;
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uint16_t arfcn;
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int arfcn_sent;
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int tsc_valid;
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uint8_t tsc;
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int tsc_sent;
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int bsic_valid;
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uint8_t bsic;
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int bsic_sent;
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int rxgain_valid;
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int rxgain;
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int rxgain_sent;
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int power_valid;
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int power;
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int power_sent;
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int maxdly_valid;
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int maxdly;
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int maxdly_sent;
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uint8_t slotmask;
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int slottype_valid[8];
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uint8_t slottype[8];
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int slottype_sent[8];
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};
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struct trx_l1h {
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struct llist_head trx_ctrl_list;
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struct gsm_bts_trx *trx;
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struct osmo_fd trx_ofd_ctrl;
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struct osmo_timer_list trx_ctrl_timer;
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struct osmo_fd trx_ofd_data;
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/* transceiver config */
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struct trx_config config;
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uint8_t mf_index[8]; /* selected multiframe index */
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uint32_t mf_last_fn[8]; /* last received frame */
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uint8_t mf_period[8]; /* period of multiframe */
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struct trx_sched_frame *mf_frames[8]; /* pointer to frame layout */
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/* Channel states for all channels on all timeslots */
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struct trx_chan_state chan_states[8][_TRX_CHAN_MAX];
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struct llist_head dl_prims[8]; /* Queue primitves for TX */
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};
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struct trx_l1h *l1if_open(struct gsm_bts_trx *trx);
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void l1if_close(struct trx_l1h *l1h);
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void l1if_reset(struct trx_l1h *l1h);
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int check_transceiver_availability(struct gsm_bts *bts, int avail);
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int l1if_provision_transceiver_trx(struct trx_l1h *l1h);
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int l1if_provision_transceiver(struct gsm_bts *bts);
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int l1if_mph_time_ind(struct gsm_bts *bts, uint32_t fn);
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#endif /* L1_IF_H_TRX */
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