77 lines
3.8 KiB
C
77 lines
3.8 KiB
C
/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*\
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File: OCTVC1_HW_RC.h
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Copyright (c) 2015 Octasic Inc. All rights reserved.
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Description: Contains the return codes for the HW API.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU Affero General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU Affero General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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Release: OCTSDR Software Development Kit OCTSDR_GSM-02.03.00-B560 (2015/08/07)
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$Octasic_Revision: $
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\*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#ifndef OCTVC1_HW_RC_H__
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#define OCTVC1_HW_RC_H__
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/***************************** INCLUDE FILES *******************************/
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#include "../octvc1_base.h"
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#include "../octvc1_generic_rc.h"
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#include "octvc1_hw_base.h"
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/****************************************************************************
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HW return codes
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****************************************************************************/
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#define cOCTVC1_HW_RC_CORE_NOT_FOUND ( 0x0004 + cOCTVC1_HW_RC_BASE )
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#define cOCTVC1_HW_RC_ETH_PORT_RESTRICTED_API_DENIED ( 0x0006 + cOCTVC1_HW_RC_BASE )
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/****************************************************************************
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ETH return codes
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****************************************************************************/
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#define cOCTVC1_HW_ETH_RC_BASE ( 0x0010 + cOCTVC1_HW_RC_BASE )
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#define cOCTVC1_HW_RC_ETH_PORT_IN_USED ( 0x0001 + cOCTVC1_HW_ETH_RC_BASE )
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/****************************************************************************
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RF_PORT return codes
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****************************************************************************/
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#define cOCTVC1_HW_RF_PORT_RC_BASE ( 0x0020 + cOCTVC1_HW_RC_BASE )
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#define cOCTVC1_HW_RC_RF_PORT_UNUSED ( 0x0001 + cOCTVC1_HW_RF_PORT_RC_BASE )
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#define cOCTVC1_HW_RC_RF_PORT_ANTENNA_UNUSED ( 0x0002 + cOCTVC1_HW_RF_PORT_RC_BASE )
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#define cOCTVC1_HW_RC_RF_PORT_ANTENNA_INTERNAL_ERROR ( 0x0003 + cOCTVC1_HW_RF_PORT_RC_BASE )
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#define cOCTVC1_HW_RC_RF_PORT_ANTENNA_CANNOT_MODIFY ( 0x0004 + cOCTVC1_HW_RF_PORT_RC_BASE )
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/****************************************************************************
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CLOCK_SYNC_MGR return codes
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****************************************************************************/
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#define cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE ( 0x0050 + cOCTVC1_HW_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_ALREADY_OPEN ( 0x0000 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_OPEN_ERROR ( 0x0001 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_CLOSE_ERROR ( 0x0002 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_BAD_PCB_INFO ( 0x0003 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_DAC_OPEN_ERROR ( 0x0004 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_PROCESS_OPEN_ERROR ( 0x0005 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_PROCESS_CLOSE_ERROR ( 0x0006 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_DAC_CLOSE_ERROR ( 0x0007 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_STATS_ERROR ( 0x0008 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#define cOCTVC1_HW_RC_CLOCK_SYNC_MGR_NOT_SUPPORTED ( 0x0009 + cOCTVC1_HW_CLOCK_SYNC_MGR_RC_BASE )
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#endif /* OCTVC1_HW_RC_H__ */
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