bladeRF: Modifying correction calls.

Modifying correction function calls to match libbladeRF API.
wip-signat
Brian Padalino 9 years ago committed by Dimitri Stolnikov
parent 03c387bcda
commit d960d1119c
  1. 28
      lib/bladerf/bladerf_common.cc
  2. 19
      lib/bladerf/bladerf_common.h
  3. 28
      lib/bladerf/bladerf_sink_c.cc
  4. 27
      lib/bladerf/bladerf_source_c.cc

@ -367,3 +367,31 @@ double bladerf_common::get_sample_rate( bladerf_module module )
return ret;
}
int bladerf_common::set_dc_offset(bladerf_module module, const std::complex<double> &offset, size_t chan)
{
int ret = 0;
int16_t val_i, val_q;
val_i = (int16_t)(offset.real() * DCOFF_SCALE);
val_q = (int16_t)(offset.imag() * DCOFF_SCALE);
ret = bladerf_set_correction(_dev.get(), module, BLADERF_CORR_LMS_DCOFF_I, val_i);
ret |= bladerf_set_correction(_dev.get(), module, BLADERF_CORR_LMS_DCOFF_Q, val_q);
return ret;
}
int bladerf_common::set_iq_balance(bladerf_module module, const std::complex<double> &balance, size_t chan)
{
int ret = 0;
int16_t val_gain, val_phase;
val_gain = (int16_t)(balance.real() * GAIN_SCALE);
val_phase = (int16_t)(balance.imag() * PHASE_SCALE);
ret = bladerf_set_correction(_dev.get(), module, BLADERF_CORR_FPGA_GAIN, val_gain);
ret |= bladerf_set_correction(_dev.get(), module, BLADERF_CORR_FPGA_PHASE, val_phase);
return ret;
}

@ -43,15 +43,6 @@
/* We currently read/write 1024 samples (pairs of 16-bit signed ints) */
#define BLADERF_SAMPLE_BLOCK_SIZE (1024)
/*
* BladeRF IQ correction defines
*/
#define BLADERF_RX_DC_RANGE 63
#define BLADERF_TX_DC_RANGE 127
#define BLADERF_GAIN_ZERO 4096
#define BLADERF_GAIN_RANGE 4096
#define BLADERF_PHASE_RANGE 2048
typedef boost::shared_ptr<struct bladerf> bladerf_sptr;
class bladerf_common
@ -67,6 +58,9 @@ protected:
double set_sample_rate(bladerf_module module, double rate);
double get_sample_rate(bladerf_module module);
int set_dc_offset(bladerf_module module, const std::complex<double> &offset, size_t chan);
int set_iq_balance(bladerf_module module, const std::complex<double> &balance, size_t chan);
osmosdr::freq_range_t freq_range();
osmosdr::meta_range_t sample_rates();
osmosdr::freq_range_t filter_bandwidths();
@ -92,6 +86,13 @@ protected:
std::string _pfx;
/*
* BladeRF IQ correction parameters
*/
static const int16_t DCOFF_SCALE = 2048;
static const int16_t GAIN_SCALE = 4096;
static const int16_t PHASE_SCALE = 4096;
private:
bladerf_sptr open(const std::string &device_name);

@ -502,22 +502,8 @@ std::string bladerf_sink_c::get_antenna( size_t chan )
void bladerf_sink_c::set_dc_offset( const std::complex<double> &offset, size_t chan )
{
int ret = 0;
int16_t val_i,val_q;
//the lms dc correction provides for 6 bits of DC correction and 1 sign bit
//scale the correction appropriately
val_i = (int16_t)(fabs(offset.real()) * BLADERF_TX_DC_RANGE);
val_q = (int16_t)(fabs(offset.imag()) * BLADERF_TX_DC_RANGE);
val_i = (offset.real() > 0) ? val_i : -val_i;
val_q = (offset.imag() > 0) ? val_q : -val_q;
ret = bladerf_set_correction(_dev.get(), BLADERF_MODULE_TX,
BLADERF_IQ_CORR_DC_I, val_i);
ret |= bladerf_set_correction(_dev.get(), BLADERF_MODULE_TX,
BLADERF_IQ_CORR_DC_Q, val_q);
ret = bladerf_common::set_dc_offset(BLADERF_MODULE_TX, offset, chan);
if( ret ) {
throw std::runtime_error( std::string(__FUNCTION__) + " " +
@ -529,18 +515,8 @@ void bladerf_sink_c::set_dc_offset( const std::complex<double> &offset, size_t c
void bladerf_sink_c::set_iq_balance( const std::complex<double> &balance, size_t chan )
{
int ret = 0;
int16_t val_gain,val_phase;
//FPGA gain correction defines 0.0 as BLADERF_GAIN_ZERO, scale the offset range to +/- BLADERF_GAIN_RANGE
val_gain = (int16_t)(balance.real() * (int16_t)BLADERF_GAIN_RANGE) + BLADERF_GAIN_ZERO;
//FPGA phase correction steps from -45 to 45 degrees
val_phase = (int16_t)(balance.imag() * BLADERF_PHASE_RANGE);
ret = bladerf_set_correction(_dev.get(), BLADERF_MODULE_TX,
BLADERF_IQ_CORR_GAIN, val_gain);
ret |= bladerf_set_correction(_dev.get(), BLADERF_MODULE_TX,
BLADERF_IQ_CORR_PHASE, val_phase);
ret = bladerf_common::set_iq_balance(BLADERF_MODULE_TX, balance, chan);
if( ret ) {
throw std::runtime_error( std::string(__FUNCTION__) + " " +

@ -567,21 +567,8 @@ void bladerf_source_c::set_dc_offset_mode( int mode, size_t chan )
void bladerf_source_c::set_dc_offset( const std::complex<double> &offset, size_t chan )
{
int ret = 0;
int16_t val_i,val_q;
//the lms dc correction provides for 6 bits of DC correction and 1 sign bit
//scale the correction appropriately
val_i = (int16_t)(fabs(offset.real()) * BLADERF_RX_DC_RANGE);
val_q = (int16_t)(fabs(offset.imag()) * BLADERF_RX_DC_RANGE);
val_i = (offset.real() > 0) ? val_i : -val_i;
val_q = (offset.imag() > 0) ? val_q : -val_q;
ret = bladerf_set_correction(_dev.get(), BLADERF_MODULE_RX,
BLADERF_IQ_CORR_DC_I, val_i);
ret |= bladerf_set_correction(_dev.get(), BLADERF_MODULE_RX,
BLADERF_IQ_CORR_DC_Q, val_q);
ret = bladerf_common::set_dc_offset(BLADERF_MODULE_RX, offset, chan);
if( ret ) {
throw std::runtime_error( std::string(__FUNCTION__) + " " +
@ -606,18 +593,8 @@ void bladerf_source_c::set_iq_balance_mode( int mode, size_t chan )
void bladerf_source_c::set_iq_balance( const std::complex<double> &balance, size_t chan )
{
int ret = 0;
int16_t val_gain,val_phase;
//FPGA gain correction defines 0.0 as BLADERF_GAIN_ZERO, scale the offset range to +/- BLADERF_GAIN_RANGE
val_gain = (int16_t)(balance.real() * (int16_t)BLADERF_GAIN_RANGE) + BLADERF_GAIN_ZERO;
//FPGA phase correction steps from -45 to 45 degrees
val_phase = (int16_t)(balance.imag() * BLADERF_PHASE_RANGE);
ret = bladerf_set_correction(_dev.get(), BLADERF_MODULE_RX,
BLADERF_IQ_CORR_GAIN, val_gain);
ret |= bladerf_set_correction(_dev.get(), BLADERF_MODULE_RX,
BLADERF_IQ_CORR_PHASE, val_phase);
ret = bladerf_common::set_iq_balance(BLADERF_MODULE_RX, balance, chan);
if( ret ) {
throw std::runtime_error( std::string(__FUNCTION__) + " " +

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